Logic of interrupt driven serial comm. ( that I have understood )

Assume I have set all the settings for interrupt driven serial comm.

Step 1. Mov SBUF,#’R’

After the last bit is sent ,TI is set

As TI is set it causes an interrupt at 0023h

The serial ISR clears the TI flag and RETI

The PC points to location of next instruction
MOV SBUF,#0DH
Then again
After the last bit is sent ,TI is set

As TI is set it causes an interrupt at 0023h

The serial ISR clears the TI flag and RETI

The PC points to location of next instruction
MOV SBUF,#0AH