1) huge capacity which is produced with solid GND plane for all signal wires? Does it not increase rise/fall times dramaticaly?

Hallo Oleg,

fortunately not. As a rule of thumb 0.3mm wide copper track running over 1.6mm distanced ground plane having a length of 20cm shows a capacitance of about

C = e0 x er x A / d = 8.85 x 10^-12 x 4.5 x 0.3mm x 20cm / 1.6mm = 1.5pF

A typical 74HCMOS input introduces an input capacitance of about 3...10pF. So, the close distance to ground plane will not dramatically increase rise/fall times.

2) About GND loops. Looking on the pictures you posted, I see that pin 20 of 8052 is connected with pins of two capacitors (those near quartz) over two layers. I mean that GND wires are placed on both bottom and top sides of PCB. Does it not produce local GND loop?

That's an optical illusion. Please have a look at the last picture. There you will see chip 74HCT08. At pin 1 there's a cross shown. Here you fetch the chip, when manipulating with routing program. The same cross both capacitors arround crystal have, which looks like having routed narrow copper traces. In real they have no connection to solid ground plane.

By the way, have a look to any other signal trace on the board and now imagine, that there's no ground plane beneath. What a terrible loop would be formed, wouldn't it? And finally, imagine that all signal lines would form these large loops...

You are right, it's important to be very careful with oscillator signal lines. And a proper design of involved ground return currents can be very demanding.

Kai