Mohammad,

Forgetting word width for the moment, how much memory do you intend to implement? Enough to buffer a message of what length?

It could be that the addressing requirements may argue for a different processor choice.

After considering this, you might calculate what you hard disk bandwidth requirements are. If you calculate assuming you have some magic method to interface word wide to the IDE interface does your intended micro have the ability to sustain this transaction rate?

If you decide a '51 is your choice of processor then perhaps you don't need 16 bit memory and a lot of RAM interfaced byte wide interface would do. As to handling the IDE xface, FIFOs would allow you to implement a word wide interface to the disk while maintaing a byte wide interface to the micro.

regards,
p