Hi Michael,
Thank you very much for your suggestions...

.(Blast that 20-40 ground/power arrangement).

I am sorry I couldn't get your point kindly put some
more light on above point.

I also agree with rerranging the capacitor location next to each crystal pin; and grounding the capacitors only to pin 20 and not to the plane (might be difficult depending on your tools.) Ground-fill under the crystal might improve emissions. If you do ground-fill, it needs to be properly anchored.

I also think my 33pf capacitor to crystal traces are somewhat longer, can you please provide me some link or layout which has smaller traces. As I have already said in reply to kai my PCB software is not allowing me to disconnect the conenction between the 33pF capacitors and GND plane I will use some other tool to modify this before I give my board for manufacturing. The new layouts posted has the crystal body grounded please let me know it's ok the way I have done it.

Also I agree that you should use 13 mil traces for all signals and use the extra space for improving power and ground.

I will modify my board for homogenous traces.

I don't know what the signals to the bottom connector are; but it can't be good to encircle the crystal with them. It'll couple noise to whatever you connect. Run them both on the same side of the crystal. And put a shield trace between the crystal signals and those I/O. If they go any distance, consider an R/C filter (47R and 0.001 uF depending on their speed).

The bottom connector is a MINI DIN 6 connector and will be used for conencting a PC type PS/2 keyboard to sytem. I can see the KBDCLK [ Keyboard Clock ] trace is encircling the crystal. In order to decouple this trace from crystal your suggestion is to put a shielding trace Do you mean a ground shield?? Still I couldn't get what do you mean by. Run them Both on the same side of the crystal.

Thanks again Mike for your suggestions.
Regards,
Prahlad Purohit