I am interfacing an 8052 with a National Semiconductor TP3054 audio CODEC. The CODEC has a master clock (MCLKx) that I am running with a 1.544-MHz oscillator. I plan to drive the CODEC's bit clock (BCLKx) with a port pin on the 8052, but according to the datasheet, the bit clock can be from 64kHz to 2.048MHz, "but must be synchronous with MCLKx".

Could someone please clarify what exactly is meant by the portion of the statement in quotes? I would assume that "synchronous with" means that the two clocks have to be at the same frequency, but this is clearly not the case. I don't assume that the master clock has to be an integer multiple of the bit clock either. I also looked at the timing diagrams, but it hasn't helped in answering my question.

Thanks in advance.
Drew Rainwater