When laying tracks on top and bottom layer of a 2 layer PCB. Try not to run a track on top and a track on bottom exactly opposite to one another. Any overlapping of top and bottom track should be avoided and overlap area should be kept minimum possible.

POOR LAYOUT:


BETTER LAYOUT:


The theory behimd this is:

*. The overlapping tracks on top and bottom acts like a parrallel plate capacitor with capacitance C directly proportional to Area of overlap. This capacitance in between tracks causes injection of charge from one track to another which can create sharp spike in one of the signal when the other is toggled. More the overlapping length more is the area of this capacitor and higher the extent capacitive coupling.

The above was just a wild idea ran over my head few minutes ago. I am not sure how serious the above can be with PCB deisign. Please Ignore the above stuff If its wrong. and let me know If I am Right.

Regards,
Prahlad Purohit