??? 04/08/05 06:53 Read: times |
#91240 - which bits Responding to: ???'s previous message |
hi,
Peter Dannegger said:
This is not possible, because the lock bits are set from the factory.
Bill Houghton said:
The lock bits are not programmed from our factory, they are in the erased state.
I think Peter talks about Atmel. Atmel xx2 devices have two groups of protection bits. HSB First group of protection bits is placed in Hardware Security Byte. There are User Memory Lock Bits LB2-0 in there. And these bits are factory programmed to level 4 (maximum security). These bits may be erased only by parallel programmer with Full Chip Erase sequence. These security bits protect the code access through the parallel programming interface. They do "classic" protection levels, so level 4 means that neither parallel programming/verification, nor external execution are allowed by default from factory. Nevertheless, these bits do not control chip access through the ISP. For this case, there are Software Security Bits which are stored in the extra Flash memory accessed by the ISP firmware. SSB Software Security Byte contains second group of protection bits. There are only two bits these, so only 3 levels defined: 1: No program lock features enabled; 2: ISP programming of the Flash is disabled; 3: Same as 2, also verify through ISP programming interface is disabled. These bits are factory erased so chips are ISP unprotected. -------- Finally: Atmel xx2 chips cannot execute program from external memory by default (when sold from factory) regardless of /EA pin level. To make it able you should perform full chip erase by parallel programmer. Make it able via ISP is not possible. PS: Checked vith AT89C51ED2 and Phyton programmer some minutes before post. Regards, Oleg |