Yep, the PSEN-case is really stupid.
But Payam suggested to persuade the chipmakers to make alternative use of PSEN/ALE/EA (and if configured by fuses when programming it IS viable).
If you need 33 IO pins and the application is const sensitive (and you could use any vanilla 89C51 except the extra IO pin), you can go crazy.
The extra single IO in costs you probably more than $1 (maybe less if you calculate only the parts costs or if you produce huge volumes, but generally it's >$1/IO, while for the 89C51 you have around $0.05/IO or so).
Don't forget, for memory-mapped IO you need to replace the pins you lost for the interface (RD/WR/P0/P2).
So let's assume we need 33 outputs, and let's calculate:
- 1x74HC573 for low address latch
- 1x74HCxx quad NOR for a primitive "address decoder" (/WR NOR /Ax)
- 2x74HC273 for output latch - we will use movx @rX,a (to preserve P2), so we will lose P0 and /WR (=9) and gain 16 outputs.
- board space, cost for population of ICs

It can be reduced to 2x74HC273 for output latch and drive it from a single port; 2 pins driving the latching input and 6 pins for data (loss=8, gain=12).

Jan Waclawek