Thanks to Andy for the helpful information!

I started to work through the "in depth" ISE tutorial and found fairly quickly that it was beyond my understanding at this point. I think I need to back up a couple of steps and learn more about Verilog and the device itself. Nevertheless, I did make a little bit of progress on the problems that were lingering yesterday. To wit:

First the USB driver problem seemed to magically go away on its own. Andy's guess was probably correct; I probably confused things by not plugging the USB cable into the same port on the computer each time.

Second, the User's Guide for the evaluation board itself explained how to program the FPGA configuration into the PROM on the board so that it persists through a power cycle. I did what it said and it worked. The original Xilinx program is gone and mine remains.

The Xilinx docs seem to be pretty good. My problem right now is that I haven't read enough of them to know where to look for a specific piece of info. (And of course it's more fun to play with the board and the software than it is to read the manuals. :) )

-- Russ