| ??? 06/15/01 21:36 Read: times |
#12539 - RE: FPGA Glitch |
are you having anything asynchronous in this setup?. An asynchronous enable of a counter require a double "D" in front to synchronize. Also, I second Mikes opinions.
Have fun, Erik |
| Topic | Author | Date |
| FPGA Glitch | 01/01/70 00:00 | |
| RE: FPGA Glitch | 01/01/70 00:00 | |
| RE: FPGA Glitch | 01/01/70 00:00 | |
| RE: FPGA Glitch | 01/01/70 00:00 | |
| RE: FPGA Glitch | 01/01/70 00:00 | |
| RE: FPGA Glitch | 01/01/70 00:00 | |
| RE: FPGA Glitch | 01/01/70 00:00 | |
RE: FPGA Glitch | 01/01/70 00:00 |



