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???
06/15/01 21:36
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#12539 - RE: FPGA Glitch
are you having anything asynchronous in this setup?. An asynchronous enable of a counter require a double "D" in front to synchronize. Also, I second Mikes opinions.

Have fun,

Erik

List of 8 messages in thread
TopicAuthorDate
FPGA Glitch            01/01/70 00:00      
RE: FPGA Glitch            01/01/70 00:00      
RE: FPGA Glitch            01/01/70 00:00      
RE: FPGA Glitch            01/01/70 00:00      
RE: FPGA Glitch            01/01/70 00:00      
RE: FPGA Glitch            01/01/70 00:00      
RE: FPGA Glitch            01/01/70 00:00      
RE: FPGA Glitch            01/01/70 00:00      

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