| ??? 09/25/07 11:15 Read: times |
#144973 - this is not matter of "thinking"! Responding to: ???'s previous message |
the "bible" in paragraph "Reset" on page 18 said:
The internal RAM is not affected by reset. See datasheet of the related part to determine the minimum RAM retention voltage while in Power-Down mode. Nevertheless, it's rather tricky to utilise this mode in practice - mainly for the need to generate a clean RESET always when the full power is restored but only when the full power is restored - I told the story on this Forum several times already. JW |
| Topic | Author | Date |
| Memory of AT89C2051 after reset | 01/01/70 00:00 | |
| this is relatively complicated... | 01/01/70 00:00 | |
| Why no reset during low power? | 01/01/70 00:00 | |
| during active reset the oscillator is running... | 01/01/70 00:00 | |
| power back up? | 01/01/70 00:00 | |
| Oh, certainly... | 01/01/70 00:00 | |
| thanks | 01/01/70 00:00 | |
| alternatives | 01/01/70 00:00 | |
| options? | 01/01/70 00:00 | |
| my way of doing this... | 01/01/70 00:00 | |
| Then jus a RAM chip would work | 01/01/70 00:00 | |
| wouldn't it be easier and safer with serial EEPROM | 01/01/70 00:00 | |
| Maybe | 01/01/70 00:00 | |
| why not FRAM | 01/01/70 00:00 | |
| Combination of Technologies.... | 01/01/70 00:00 | |
| SRAM | 01/01/70 00:00 | |
| I don't think so | 01/01/70 00:00 | |
| this is not matter of "thinking"! | 01/01/70 00:00 | |
| OK, an another gotcha | 01/01/70 00:00 | |
| to Jan | 01/01/70 00:00 | |
| no | 01/01/70 00:00 | |
here is the best chip for u! | 01/01/70 00:00 |