What I'm pointing out is that the RESET signal doesn't do what one might, superficially, expect.

In the case in question, I was using BBRAM, 64KB of it, and found it was repeatedly corrupted despite the fact I'd put in a "supervisor" IC (DS1232) in order to mitigate the problem. While that reduced the occurrence from one time in fewer than ten to one time in, say, twenty, it didn't significantly reduce the risk of memory corruption. That made me curious, so I attached 'scope and logic analyzer, and observed that, as the power supply decayed, the supervisor asserted RESET, but as the supply continued to decay, the MCU generated selects and write strobes to the BBRAM. Since the supervisor reacts to one set of voltage levels to assert and negate RESET, and the BBRAM responds to a different set of thresholds, there was a window within which the supervisor asserted RESET, but the MCU, now operating below its minimal Vcc threshold, apparently "thought" it was OK to go ahead and do something. The BBRAM, OTOH, didn't "know" it was time to block writes yet. The result, well, corrupted content in the external BBRAM.

I would conclude that if it can malfunction in this way with external BBRAM, it could just as well run amuck causing random effects on internal resources. In any case, there's no evidence that it couldn't. I view this as a starting premise. Since I have, and you repeatedly have said you have not, examined the "reset problem" in detail, albeit not yet in a rigorous fashion, I feel I am at least somewhat prepared to comment on the general case of RESET malfunctions. Nobody else has been willing to pursue any of their "reset problems" any further than you, so I can't blame you alone for the lack of detailed study. I do find it troubling, though, that the MCU sometimes runs during Vcc decay with RESET asserted.

One of these days, I'll get around to running a long-term million-cycle (about three-four weeks) test. In the meantime, since nobody's paying for the effort, it will have to wait until I'm so moved.

Since you, yourself, Erik, have, so far, been unwilling to pursue the matter in detail, you're in no position to comment on what might or might not be affecting these devices during the power-up or power-down transient.

RE