Hello,

I'm encountering something a bit odd and wonder if anyone can shed any light on this. I did search the forum and have reviewed quite a number of the postings, and haven't seen anything about this, if it is there I just missed (if this is the case sorry).

Here goes:
Here is a pseudocode example:

mov DPL,#someAddressLo
mov DPH,#someAddressHi
mov A,someVariable
movx @DPTR,A
mov DPH,#anotherAddressHi
mov A,anotherVariable
movx @DPTR,A

So what appears to happen is that the data put into A doesn't appear at the output of the latch, the DPL value does. My logic on the PCB is fine as the wr' signal occurs on the second half of the MOVX instruction (I see it with my scope, since I am testing using a loop it happens with regularity) when the data is written and the invalid data is strobed into the latch by an enable derived from the wr' signal and the DPH value.

When I load the code into my DryICE emulator (properly org'd I might add) the same thing happens: The value that is output on the P0 data bus on the second half of the MOVX instruction is whatever the value is that I have stored in the DPL. Using the emulator allows me to change the DPL value and look at the RAM used by the emulator as external memory. The invalid data is always at the location as set by DPH/DPL.

Can anyone explain why this might be happening? I have been banging my head against the wall for a while now trying to figure out what is going on.

Thanks in advance, Jeff Biss