Raghu:
I would think that if you did two things that the system should work just peachy. First arrange the period measurement interrupt so that it occurs AFTER the critical event but is assured of being serviced well before the next time the critical event. The critical event to which I refer is the capture event which traps the counter value, try to do this in hardware without closing the loop on the capture circuit via the interrupt. For example maybe you need to use a hardware GATE signal which is generated from another PCA channel. The second thing is to ensure that the MUX'ed display update interval interrupt is designed so that it is short enough so that it does not extend first capture interrupt latency time too far as to push the capture interrupt past its worst case service time.

It should be possible to get this to work nicely without even having to assign one of the interrupts to the higher proiority mode!! But you could consider the priority thing too if you wish.

Michael Karas