??? 05/14/04 05:53 Read: times |
#70316 - RE: Input signals to A/D Responding to: ???'s previous message |
Hallo Joe,
very little common mode range results from performance of current limiter arround Q2 & U8. U8 compares voltage at inverting input with voltage at noninverting input of about 2.26V (voltage divider R6 and R10). Whenever voltage at inverting input of U8 tries to become bigger than 2.26V, Q2 is turned off. When will this happen? Either, if you have no common mode input voltage AND 22.6mA current flowing through shunt resistors R5, R13, or if you have a common mode input voltage of 2.26V AND NO current flowing through R5, R13! By other words: Your circuit does only allow a common mode input voltage of 0.26V, if 20mA current is flowing!! That's rather stupid, because rest of circuitry could accept much higher common mode input voltage. If the only effect of over current limiter circuitry is to protect INA128, then a different approach can be choosen: Inputs of INA128 can withstand up to +-40V. So, connect from each input (pin 2 and 3) to ground suited bidirectional zener diodes. In combination with R4 and R11 this gives a nice protection circuit. Choose threshold voltage high enough, so that leakage current through them will not cause errors. Also, power supply voltage should be choosen rather high, +-15V for instance. If supply voltage is much lower, this chip will not be able to accept high common mode input voltages. With +-15V at least +-10V common mode input voltage can be accepted. As Erik reported earlier, some people connect current recievers in series. Then, grounds of all involved recievers must float relative to each other! If very high common mode input voltages must be accepted by your reciever, then a different approach should be followed. Have a look at datasheet of INA117 for instance. Here, input voltage runs through a high precision voltage divider, so that up to +-200V common mode input voltage can be accepted. Kai |
Topic | Author | Date |
Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
To be added ... | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D - CMRR | 01/01/70 00:00 | |
Answer + circuit modification | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D![]() | 01/01/70 00:00 |