??? 05/15/04 05:29 Read: times |
#70389 - RE: Input signals to A/D Responding to: ???'s previous message |
Can the circuit be improved with minor changes while still maintaining it's current limit protection?
I don't think so. The problem is, that U2 has floating inputs but not Q2 and U8. You would need to detect the voltage drop across the shunt resistors. This is possible by using an instrumentation amplifier. But as input voltage can rise to 24V, which is identical to its supply voltage, common mode input voltage range of this instrumentation amplifier would be overranged. So, this instrumenation amplifier would need a voltage divider at its inputs. But this would introduce additional common mode impedance. As consequence not the whole signal current would flow through shunt resistor, resulting in a certain error, which depends on actual value of common mode voltage. But even if this problem would have been overcome, fabrication of gate voltage of Q2 must still be changed. Gate voltage must no longer be referenced to 0V, but must also float. In the present circuit there's a certain danger that either the inverting input of U8 is overranged (and eventually destroyed!) or the gate source voltage of Q2 is overranged (and eventually destroyed!). To measure the voltage drop across shunt resistor and to fabricate by the help of this data a current limiter, which is really floating, is not an easy task! But happily there are easier methods to fabricate a real floating current limiter: ![]() If current rises up, voltage drop across trimmer increases, producing a negative Ugs. If Ugs becomes about -1.0V, then current through N-channel Depletion FET DN2540 is limited to about 24mA. This data suffers from tolerances and temperature coefficients, of course. But with careful adjusting of 100R trimmer (20turn cermet), a satisfying perfomance should be possible. Mount Q2 on a heat sink and use higher power types for shunt resistors. About 1W should be acceptable. Then even longer lasting eroneous shortings to 24V will not make problems. Assume that finally current is limited to 50mA. Then, 50mA gives voltage drop of 5V across shunt resistors. So, each 200R shunt resistor dissipates 125mW. Across Q2 a voltage of 24V - 5V = 19V is dropping. In combination with 50mA current flow, this gives a heat dissipation of 0.95W. Current limiting threshold should be set to about 30mA. If you go nearer to 20mA, then this might result in unacceptable high Drain Source voltage, means voltage drop across Q2. If, on the other hand a too high threshold is set, then heat dissipation at Q2 and shunt resistors can be too high. The threshold is set properly, if under all circumstances (temperature changes, e.g.) Uds at 20mA current is acceptable low. Make some tests... Of course, even with bipolar transistors nice working current limiters can be designed. If you need similar high maximum collector emitter voltages like they are achieved with DN2540, namely 400V, then high voltage transistors must be choosen. Kai |
Topic | Author | Date |
Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
To be added ... | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D - CMRR | 01/01/70 00:00 | |
Answer + circuit modification | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D | 01/01/70 00:00 | |
RE: Input signals to A/D![]() | 01/01/70 00:00 |