??? 08/24/04 08:14 Read: times |
#76320 - RE: SPI rate with Atmel X2 chips Responding to: ???'s previous message |
Clear to select 6 clock periods per peripheral clock cycle. Set to select 12 clock periods per peripheral clock cycle. Dear Oleg: I guess above statements has been copy pasted too much;) Because each peripheral has its own divisor for example UART divide input clock (from timer overflow) by 16 and and timer divide the input clock by 12 so clock cycle of timer, PCA and UART and SPI should be different. The only conclusion that I can draw is CKCONs control divisors by 2 for each peripheral (for compatibility sake). Also nothing has been mentioned in AT89 hardware descriptions. If you found documents confirming or denying my conclusion please let me know. Best Regards Reza Fallahati |
Topic | Author | Date |
SPI rate with Atmel X2 chips | 01/01/70 00:00 | |
RE: SPI rate with Atmel X2 chips | 01/01/70 00:00 | |
RE: SPI rate with Atmel X2 chips | 01/01/70 00:00 | |
RE: SPI rate with Atmel X2 chips | 01/01/70 00:00 | |
RE: SPI rate with Atmel X2 chips | 01/01/70 00:00 | |
RE: SPI rate with Atmel X2 chips | 01/01/70 00:00 | |
RE: SPI rate with Atmel X2 chips | 01/01/70 00:00 | |
RE: SPI rate with Atmel X2 chips | 01/01/70 00:00 | |
RE: SPI rate with Atmel X2 chips | 01/01/70 00:00 | |
RE: SPI rate with Atmel X2 chips | 01/01/70 00:00 | |
RE: SPI rate with Atmel X2 chips | 01/01/70 00:00 | |
RE: SPI rate with Atmel X2 chips | 01/01/70 00:00 | |
RE: SPI rate with Atmel X2 chips | 01/01/70 00:00 | |
RE: SPI rate with Atmel X2 chips | 01/01/70 00:00 | |
RE: SPI rate with Atmel X2 chips![]() | 01/01/70 00:00 |