??? 12/31/04 07:05 Read: times |
#84157 - Haven't read it completely?
Responding to: ???'s previous message |
..or maybe it's my clumsy English... I mentioned the majority-of-three-samples at the end of my previous post... Nevertheless, I had a look into the datasheets and to make an interrupt on P1.0 on down-going edge, timer 2 must be enabled (and interrupt enabled, of course), set as counter and filled by FFFF. It even does not need to be disabled during byt reception as is the case if external interrypt is used to detect the start bit... Jan Waclawek |
Topic | Author | Date |
Polling/Interrupt For Serial Input | 01/01/70 00:00 | |
bible time | 01/01/70 00:00 | |
Soft UART | 01/01/70 00:00 | |
Hardware? | 01/01/70 00:00 | |
SW UART is not a taboo! | 01/01/70 00:00 | |
yes... | 01/01/70 00:00 | |
think before you do | 01/01/70 00:00 | |
Use oversampling | 01/01/70 00:00 | |
soft UART | 01/01/70 00:00 | |
Half bits | 01/01/70 00:00 | |
Oversampling | 01/01/70 00:00 | |
It's not so bad | 01/01/70 00:00 | |
Oh yes it is! | 01/01/70 00:00 | |
Haven't read it completely? | 01/01/70 00:00 | |
neither have I | 01/01/70 00:00 | |
Sure you did not! | 01/01/70 00:00 | |
did I miss it | 01/01/70 00:00 | |
Problem displaying posts? | 01/01/70 00:00 | |
sure that will work | 01/01/70 00:00 | |
NOT A PIC | 01/01/70 00:00 | |
Just forget 89c51 then. | 01/01/70 00:00 | |
@Erik | 01/01/70 00:00 | |
...all said already. | 01/01/70 00:00 | |
OS? Threads?! | 01/01/70 00:00 | |
Appnote to read | 01/01/70 00:00 | |
threads | 01/01/70 00:00 | |
Problem Solved![]() | 01/01/70 00:00 |