| ??? 02/14/05 21:12 Read: times |
#87436 - sure Responding to: ???'s previous message |
When I have seen the description in the "bibles" I immediately realized the reason - same as you described above. Originally, I was surprised by the absence of 2-cycle strong pullup when the P2 "recovered" after a memory cycle and a 1-1 transition occurred. I thought this required extra circuits to distinguish from the 0-1 transition; I was not aware that that circuit is already there. I remember a piece of code, where an output pin of '51 driving a N-MOSFET was set twice in a row; the accompanying comment claimed that each setb causes a strong-pullup-pulse hence speeding up charging of the gate. This stuck somehow in my mind... and today I learned this is an another myth... Thank you for the exhaustive explanation "down to the roots". Jan Waclawek |
| Topic | Author | Date |
| P2:R0 as memory pointer | 01/01/70 00:00 | |
| Read the cpu data! | 01/01/70 00:00 | |
| P2 readback | 01/01/70 00:00 | |
| Re | 01/01/70 00:00 | |
| Thank you all | 01/01/70 00:00 | |
| Interesting | 01/01/70 00:00 | |
| very well described | 01/01/70 00:00 | |
| This is NOT in the | 01/01/70 00:00 | |
| ch3 pg 6 | 01/01/70 00:00 | |
| none of them | 01/01/70 00:00 | |
| more | 01/01/70 00:00 | |
| An experiment - AT89C8252 | 01/01/70 00:00 | |
| not necessarily | 01/01/70 00:00 | |
| sure not necessarily | 01/01/70 00:00 | |
| talking about memory | 01/01/70 00:00 | |
| MOVX multiplexed with P2 SFR data | 01/01/70 00:00 | |
| Now I say: HUH | 01/01/70 00:00 | |
| huh | 01/01/70 00:00 | |
| Thank you | 01/01/70 00:00 | |
| what datasheet says | 01/01/70 00:00 | |
| I should've RTFM... :-) | 01/01/70 00:00 | |
| not too much logic | 01/01/70 00:00 | |
| sure | 01/01/70 00:00 | |
| The horses mouth | 01/01/70 00:00 | |
| horse is plural | 01/01/70 00:00 | |
| I'd be happy to ... | 01/01/70 00:00 | |
| can't find them | 01/01/70 00:00 | |
As you use to say :) | 01/01/70 00:00 | |
| another note | 01/01/70 00:00 |