??? 02/15/05 14:29 Read: times |
#87518 - Problem getting 8051 chip to work |
Hello all,
I am trying to us an Atmel T89C51Rd2 (DIP) chip in a project but I cannot seem to get the chip to do even the simplest task. [IMG]http://www.skynet.ie/~mikeh/SCHEMATIC.jpg [/IMG] I have built the above circuit (wirewrapped) and I have a 0.1uF decoupling cap connected to the VCC pin of the 8051. Using the following code sometimes the LED stays on, other times it goes off, but it never keeps flashing. Code: PORT_PIN_LED EQU P3.4 CSEG ORG 0000H LJMP main ORG 0048H main: CPL PORT_PIN_LED CALL delay JMP main delay: MOV R7, #200 dly1: MOV R6, #229 dly2: DJNZ R6, dly2 DJNZ R7, dly1 RET END (This code works perfectly using an Analog ADUC812 development board but unfortunally I cannot use this in the project.) Using a scope I have checked to ensure the crystal is oscillating, and it is, and the hardware reset is operating without any problem also. I have also built the same circuit, using the same components, and the same power supply, on a development board and it works 90% of the time. I have tried using the circuit without the inverter present, and connecting the led to every other port pin on the chip (of course changing the code appropriately) and it makes no difference. (I have also tried changing every component and have tried 4 different T89C51RD2 chips but to no avail). I have read all the tutorials and FAQs on this site but haven't found anything that might account for this behaviour. The only thing I have found in the datasheet is the following but I'm not fully sure what it means to me: Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed on the VOLs of ALE and Ports 1
and 3. The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0 transitions during bus operation. In the worst cases (capacitive loading 100pF), the noise pulse on the ALE line may exceed 0.45V with maxi VOL peak 0.6V. A Schmitt Trigger use is not necessary. The reason I think this might be important is because the only difference between the wirewrapped board and the development board is the capacitance of the boards and the capacitance of the wires used. Any help/suggestions would be greatly appreciated because I'm well confused. Thanks, Ray |
Topic | Author | Date |
Problem getting 8051 chip to work | 01/01/70 00:00 | |
tie ~EA pin to Vcc | 01/01/70 00:00 | |
tie Vpp/~EA pin to Vcc | 01/01/70 00:00 | |
to connect or not? | 01/01/70 00:00 | |
conbnect | 01/01/70 00:00 | |
If it helps.... | 01/01/70 00:00 | |
Reset Capacitor | 01/01/70 00:00 | |
connect | 01/01/70 00:00 | |
T89C51RD2 | 01/01/70 00:00 | |
This device is ISP | 01/01/70 00:00 | |
VCC and GND? | 01/01/70 00:00 | |
I think you do not load | 01/01/70 00:00 | |
Series resistor for LED? | 01/01/70 00:00 | |
74F14 | 01/01/70 00:00 | |
give me +1 too | 01/01/70 00:00 | |
done | 01/01/70 00:00 | |
Sorry | 01/01/70 00:00 | |
LED Polarity | 01/01/70 00:00 | |
Does not seem to be the cause | 01/01/70 00:00 | |
Ouch! | 01/01/70 00:00 | |
FAST-TTL and breadboarded design | 01/01/70 00:00 | |
Ground bounce | 01/01/70 00:00 | |
Bad news 74F =( | 01/01/70 00:00 | |
HCT? | 01/01/70 00:00 | |
LS, HCT and maybe AHCT | 01/01/70 00:00 | |
Got it | 01/01/70 00:00 | |
wire wrap and breadboards | 01/01/70 00:00 | |
I use protoboard | 01/01/70 00:00 | |
the problem with that is | 01/01/70 00:00 | |
Thanks | 01/01/70 00:00 | |
Why do you want to use 74F chips? | 01/01/70 00:00 | |
well...![]() | 01/01/70 00:00 | |
maybe you are still in ISP mode? | 01/01/70 00:00 | |
1st things 1st please | 01/01/70 00:00 | |
Thanks | 01/01/70 00:00 | |
bounce on non PCB | 01/01/70 00:00 | |
Analytical thinking | 01/01/70 00:00 |