??? 02/19/05 13:34 Read: times |
#87958 - Re:JTAG Responding to: ???'s previous message |
Hi Ashish,
The point about the reset pin is interesting. I spoke yesterday to support at Cygnal and one question that came up was - had I looked at the reset line. So that was going to be the next task. The reset line presently is pulled up to 3.3v with a 1K resistor without any capacitor at present. For the other 2 micros on the board we use I think either 4.7 or 10K. Maybe the effective time constant of the lower 1K line is allowing some startup spikes through? I will try adding capacitance first as we have the board in production and I don't have room to add a supervisor IC. We should probably add that in the next revision, although we have not had any apparent problems with the other micros. Thanks for your quick response John Robbins |
Topic | Author | Date |
JTAG question | 01/01/70 00:00 | |
re: | 01/01/70 00:00 | |
Re:JTAG | 01/01/70 00:00 | |
Stop!! | 01/01/70 00:00 | |
Not even a question!! | 01/01/70 00:00 | |
Re:JTAG | 01/01/70 00:00 | |
Another thing... | 01/01/70 00:00 | |
Re:JTAG | 01/01/70 00:00 | |
Reset generators` | 01/01/70 00:00 | |
SC-70-3 Reset Circuits | 01/01/70 00:00 | |
mandatory | 01/01/70 00:00 | |
Re:JTAG | 01/01/70 00:00 | |
Which all goes to show... | 01/01/70 00:00 | |
reset supervisor![]() | 01/01/70 00:00 | |
Re:JTAG | 01/01/70 00:00 | |
correct, but | 01/01/70 00:00 | |
Re:JTAG | 01/01/70 00:00 | |
yes, but | 01/01/70 00:00 | |
Re:JTAG | 01/01/70 00:00 |