| ??? 02/23/05 15:48 Read: times |
#88230 - Re:JTAG Responding to: ???'s previous message |
Thanks for your input.
The three different Silab chips all are open drain on the /RST pin so I guess direct connection of the pins to the supervisor is the way to go. |
| Topic | Author | Date |
| JTAG question | 01/01/70 00:00 | |
| re: | 01/01/70 00:00 | |
| Re:JTAG | 01/01/70 00:00 | |
| Stop!! | 01/01/70 00:00 | |
| Not even a question!! | 01/01/70 00:00 | |
| Re:JTAG | 01/01/70 00:00 | |
| Another thing... | 01/01/70 00:00 | |
| Re:JTAG | 01/01/70 00:00 | |
| Reset generators` | 01/01/70 00:00 | |
| SC-70-3 Reset Circuits | 01/01/70 00:00 | |
| mandatory | 01/01/70 00:00 | |
| Re:JTAG | 01/01/70 00:00 | |
| Which all goes to show... | 01/01/70 00:00 | |
reset supervisor | 01/01/70 00:00 | |
| Re:JTAG | 01/01/70 00:00 | |
| correct, but | 01/01/70 00:00 | |
| Re:JTAG | 01/01/70 00:00 | |
| yes, but | 01/01/70 00:00 | |
| Re:JTAG | 01/01/70 00:00 |