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???
03/12/05 20:35
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#89554 - All in a days work.
Responding to: ???'s previous message
A few years ago I did an ISA bus controller board for an
industrial laser controller system. The design used two
large FPGA devices from Lattice one of which is shown in
partial in the picture of the schematic below. As you can
see the pinout of things like the address and data bus
appear to be anything but convenient. (When working
with programmable logic devices it is highly beneficial
and sometimes mandatory to let the FPGA design tool
assign the pinouts so as to optimize internconnections
in/out of the chip).


Looking at the snapshot of the board artwork in the
layout package you can see that it really does not make
much difference whether the address and data bus are
"conveniently" on adjacent pins. You just need enough layers,
power and ground planes, and small enough vias. It's all
in an days work.

Schematic Section:



Artwork Section:



Michael Karas




List of 21 messages in thread
TopicAuthorDate
WEOT: Inconvinient Pinouts.            01/01/70 00:00      
   Cranky pin outs            01/01/70 00:00      
      some like the mother, some the daughter            01/01/70 00:00      
         Z80 family            01/01/70 00:00      
   Not necessarily bad...            01/01/70 00:00      
      It will work.......            01/01/70 00:00      
         When and when not?            01/01/70 00:00      
            RAM/EPROM            01/01/70 00:00      
               Many tolerate it, but some not!            01/01/70 00:00      
   inconvenient pinouts            01/01/70 00:00      
      or thread between pins...            01/01/70 00:00      
      Re: Living in past.            01/01/70 00:00      
   the real question            01/01/70 00:00      
      Errr...... probably            01/01/70 00:00      
      Actually...            01/01/70 00:00      
   erk            01/01/70 00:00      
      Do you mean the package?            01/01/70 00:00      
   package            01/01/70 00:00      
   Max 7301            01/01/70 00:00      
   All in a days work.            01/01/70 00:00      
      FPGA pinouts            01/01/70 00:00      

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