| ??? 03/14/05 03:41 Read: times |
#89603 - FPGA pinouts Responding to: ???'s previous message |
Michael Karas said:
When working
with programmable logic devices it is highly beneficial and sometimes mandatory to let the FPGA design tool assign the pinouts so as to optimize internconnections in/out of the chip. Not all that mandatory any more. New families have so many routing resources that in all but the most extreme cases you can choose a pinout that's layout friendly. By "extreme cases" I mean those pushing the speed limits or when you're utilizing 99% of the chip. I remember the "Bad old days" when you'd finish a design, let the tools choose the pins, go to layout, and then if you had to tweak the FPGA, reroutes would take forever because the pins were frozen. -a |
| Topic | Author | Date |
| WEOT: Inconvinient Pinouts. | 01/01/70 00:00 | |
| Cranky pin outs | 01/01/70 00:00 | |
| some like the mother, some the daughter | 01/01/70 00:00 | |
| Z80 family | 01/01/70 00:00 | |
| Not necessarily bad... | 01/01/70 00:00 | |
| It will work....... | 01/01/70 00:00 | |
| When and when not? | 01/01/70 00:00 | |
| RAM/EPROM | 01/01/70 00:00 | |
| Many tolerate it, but some not! | 01/01/70 00:00 | |
| inconvenient pinouts | 01/01/70 00:00 | |
| or thread between pins... | 01/01/70 00:00 | |
| Re: Living in past. | 01/01/70 00:00 | |
| the real question | 01/01/70 00:00 | |
| Errr...... probably | 01/01/70 00:00 | |
| Actually... | 01/01/70 00:00 | |
| erk | 01/01/70 00:00 | |
| Do you mean the package? | 01/01/70 00:00 | |
| package | 01/01/70 00:00 | |
| Max 7301 | 01/01/70 00:00 | |
| All in a days work. | 01/01/70 00:00 | |
FPGA pinouts | 01/01/70 00:00 |