??? 06/20/06 21:51 Read: times |
#118653 - DMA, logic and stuff... Responding to: ???'s previous message |
Richard Erlacher said:
I won't argue the matter of DMA as a concept, at this time, BUT, from the standpoint of implementation, it requires, not only that there be a good deal of additional logic, BUT, that there be a good deal of additional logic interposed between the CPU core and all its resources, in order to give the DMAC access to the same pins (both internal and external) that the CPU core uses to access those same resources. [... etc. I think I get your point by now JW] Don't get me wrong. If you want a softcore '51 with zero or minimum SFR, peripherals, anything, have it. Enjoy. I am only making a couple of suggestions and hints - they may be stupid and completely wrong, of course, you know me by now, I chatter nonsense from time to time... :-) But, the point is, if you want a hyperfast core, you WON'T build a bottleneck multiplexing code and data memory bus. Hence, while the DMA controller or anything similar happily reduces the performance of DATA access (which is already bad, having only 1 16-bit pointer which takes ages to load/modify), while the CODE memory interface stays untouched running as fast as it can... 0.02SKK (practically zero) :-))) JW |