Erik said, quoting me, ""The amount of code (=cycles) to read XRAM is minimum 3 times the amount of code required to read internal RAM direct or indirect.""
and then went on,
contemplating an alternative that will make all the instructions one clock-tick long, even the 2- and 3-byte ones"

mov DPH,varadr
mov DPL, varadr+1
movx A,@dptr
mov R7,a <= this one would have to be executed anyway
4 instructions

as opposed to
mov R7,var <= this only works if the destination is a register
1 instruction

or
mov R0,varadr
mov AR7,@R0 <= what's an AR7?

2 instructions

so, unless you come up with something that does "it" in the same time regardless of how many instructions it takes, sure it does matter

Erik "

I'd say that loading the data pointer, since it has no impact on anything else, can be done out of order or concurrently with another instruction. both bytes of the DPTR can be loaded concurrently, too, if desired. Now, I'm not sure that's the way to go, but it deserves a look.

If one can reduce the instruction timing to one clock tick per instruction, no matter what, it would save on power, among other things, since one could then reduce the oscillator rate and still achieve the same performance.

I'm examining alternatives now, so I won't regret it later.

I'm still curious how the automatic clearing of the RI/TI bits would hurt people. Remember, I'm going to have it act "normal" right up to the point at which the serial data buffer is written or read.

RE