Interestingly, I have been using Cirrus (formally Crystal) 5520 and 5532 delta-sigma type ADCs for many years. The former is 20-bit, the latter 24-bit. Used with bridge sensors (load cells in my case), they require no additional components on the input that could significantly influence error, except of course RC networks to restrict input bandwidth (necessary for such ADC technique). And they will work down to tens of millivolts full scale (AND ratiometrically!), which is fantastically convenient (no instrumentation amps and precision resistors).

Obviously, 24-bit is hugely OTT for load cells with typically 1:3000 precision, but as Erik (I think) pointed out, their maximum practical precision is 19.5-bits at best. Designing circuit boards for them is always challenging - digital noise exclusion, thermoelectric effects (huge) and EMC (typically have to show no more than 0.015% shift in output when exposed to 3v/m field of RF between 100kHz and 1GHz).

One effect I have noticed with these converters is a cyclical, almost random, low frequency (typically 0.1Hz) span noise. Zero drift is effectively zero for our purposes - a dream when I remember what I used to battle with when using dual slope and successive approximation techniques. But this wandering span drift is really critical. Some devices are very good, others (even from the same production batch) can start to reach our margins of error.

I presume it is some atomic level effect within the device. Of course, Cirrus have never acknowledged it, and suggest it is my application that is at fault. However, I can never equate it to anything going on externally. I realise that everthing happens in the time domain, but the crystal controlled clock is rock steady.

Any experience of this, Kai?

Best regards,

Dave