That's what's bugging me in this case, as the /EA line is grounded and the code resides in an external EPROM. Ports 0 and 2 should always be driven with sufficient current to "do the job," but they're clearly not. I'm also not sure why the thing fails to run and gets hot while the oscillator is running at a lower-than-maximal rate, even in the case where the internal crystal oscillator is in use.

Now, I've used the external oscillator because I ultimately will need a PLD to switch between clock sources without glitching the clock, hence, won't be using the internal oscillator.



This is clearly a mental-masturbation exercise, as the DS89C4x0's seem to work just fine in the application where they drop in for the older parts. It's just puzzling that the old parts, even though they're not previously used, behave peculiarly in an environment where they clearly should behave normally.

The CMOS devices don't seem to care whether the pullups are plugged in or not, while the HMOS parts definitely want them there.

There's a common application that uses only one latch, i.e. it has a latch on P0 to catch the low addresses. I wonder how well the high addresses, as applied to the NMOS EPROM and CMOS RAM behave. Back in the old days, we didn't have the CMOS RAM, and the NMOS tolerated the levels that NMOS/HMOS parts provided. In the past I've had no trouble substituting the CMOS RAMs for the older NMOS ones. Should I anticipate problems of this sort there?

RE