For 16 bytes you could do manual minimisation (Karnaugh maps), no need for fancy QM, you could also spot all residual redundancy by hand so what's the fuss then? You'll have 8 maps (4x4 each), 5 minutes per map = 40 minutes work, adjusting to base total cca 20 minutes = 60 min for complete set of functions.

You could also check your design in EW or some other tool to be certain you have got all functions right (60 min tops for 16 bytes).

So, what's the trouble? You can finish it in 2 hours work.

Go, minimise it, adjust it to your logic base, simulate and build your toy. Beside the fact you go about things wrong way, I don't see a real problem. What you suggest is completely unneccessary but 'doable' and can result in working hardware. If you look at it like mental exercise, well then - whats stopping you?

You could also try to do 4-bit binary -> BCD conversion 'in hardvare'... But then I suggest you to try it on EW rather than spend your money on building a working prototype, but, after all that's your money...

Best luck,
CN