What I'd compare to bipolar PROMs is the then-new (1983-84) AC logic, which nearly halved the prop-delays of "S" logic, at much lower power. I had 8 KB CMOS EPROMS by 1987 that had Taccs of 55 ns and bipolars of much smaller size, though suitable for FSM's were being replaced at a good pace by GALs, which didn't have the production losses of the bipolar PALs, and were somewhat faster. At the time, I was working in an industry where it was desirable to erase the content of any programmable devices automatically, so bipolars weren't particularly interesting anyway.

Altera was marketing their CMOS (now "classic") EPLD's, which weren't electrically eraseable but were speed-competitive with bipolars of the time. AMD was beginning to replace their bipolar programmables with CMOS EEPALs. They never did produce small CMOS EEPROMs, AFAIK.

I still find my self wishing for a small, fast PROM or even RAM from time to time. Now, when I need 16 bytes of fast storage, I have to use a 32Kx8. Fortunately, the block RAM in FPGA's is getting bigger, though the gates-to-RAM ratio is still way too far in the wrong direction for many of my tasks.

As for this ROM issue ... I had to build a ROM in hardware once ... 256 bytes, IIRC, and I DO recall ... using R-packs and diode packs to set the bit values. I even considered dip-switches. I think, using TTL SSI/MSI, it would take more buffers than one might think, as TTL only drives 10 "loads" at its outputs, and in my ROM, the zeroes were driven by a decoder/demultiplexer, so the pullups were limited to what the demultiplexer could sink. It was big and it was tedious. It wasn't pretty. Changing it was a pain. I wouldn't want to do that again.

RE