| ??? 02/12/07 23:48 Read: times |
#132698 - Pipelining in the 8051 Responding to: ???'s previous message |
There is a slight amount of pipelining in the 8051, in that in most instructions, there is a one clock overlap (pipeline) between instructions. The next opcode is being fetched while the last of the old instruction is being executed.
The modern concept of pipelining is difficult to apply to older designs which took multiple clocks per instriction. |
| Topic | Author | Date |
| port expander ... NOT 82C55! | 01/01/70 00:00 | |
| have not, but how about a link | 01/01/70 00:00 | |
| Link... | 01/01/70 00:00 | |
| Not so fast with the TK68HC24 | 01/01/70 00:00 | |
| Nothing critically timed ... | 01/01/70 00:00 | |
| Generation of "e" clock | 01/01/70 00:00 | |
| inserting a square peg in a round hole | 01/01/70 00:00 | |
| Yes, it requires tools to make it fit ... | 01/01/70 00:00 | |
| The reason for 2 ALE cycles | 01/01/70 00:00 | |
| Too bad they weren't smarter ... | 01/01/70 00:00 | |
| Pipelining in the 8051 | 01/01/70 00:00 | |
| It\'s possible in some cases ... | 01/01/70 00:00 | |
| technology marches on | 01/01/70 00:00 | |
Those Dallas 4-clockers date back to ~1992 or so | 01/01/70 00:00 |