It's not a question of convincing me. Nobody has provided even a hint of any effort to study out the "problem." Nobody has shown even a shred of evidence that it's really the RESET circuit that causes, or, ultimately, mitigates, the problems to which they occasionally allude.

The simple fact that an MCU I was examining during the power-down transient didn't respond to the RESET, generated by a supervisor, by ceasing its external memory accesses once the supply was out of specified limits tells me all is not well with this "solution." I was, of course, also puzzled by the fact the BBRAM didn't protect itself from the brownout as it should have. Had the MCU stopped when RESET was asserted, and stayed stopped, this would never been noticed.

Now, I've stated that my encounter with this problem wasn't in the course of any rigorous exercise. I was simply poking around with a Maxim/Dallas and a Philips MCU in the same circuit and found that both of them clobbered their BBRAM. That made me curious. Apparently nobody else has seen any problems that have made them curious enough to poke around with 'scope and logic analyzer. They just add a supervisor and call it good. I'm not convinced that's good practice.

RE