as in the case of having a long wire attached to /RST.
which is ridiculous and "asking for it"

You have to look at their target board schematic which is different than in the way that I had imagined doing it.

simple and easy.

Now, after the above, I do agree that the SILabs datasheets are not the most wonderful in the industry.

One thing to remember is that uploading/debugging etc is supposedly done by qualified people and thus the ambiguity as it refer tho these is not totally ridiculous.

My guess is that the OPs original question is simply related to the Vdd/gnd decoupling caps either too few or too long traces.

Erik