| ??? 10/28/02 17:08 Read: times |
#31565 - RE: interfacing sram |
Jay Jay, Even if you go this route you will have to consider the issue of having the read out circuit know when the 8052 has completed the writing of the data. This can be handled with a dual port RAM via the "flags" register these chips have.
Absolutely. However, I have often found it easier (lower pin usage) to dedicate a BYTE (not bit) set to zero or ff as the flag. If simultaneous access happens (sender set flag, receiver check it) using zero/nonzero will guarantee that even an erroneous read due to the simultaneous access will give a useable result. Erik |
| Topic | Author | Date |
| interfacing sram | 01/01/70 00:00 | |
| RE: interfacing sram | 01/01/70 00:00 | |
| RE: interfacing sram | 01/01/70 00:00 | |
| RE: interfacing sram | 01/01/70 00:00 | |
| RE: interfacing sram | 01/01/70 00:00 | |
| RE: interfacing sram | 01/01/70 00:00 | |
| RE: interfacing sram | 01/01/70 00:00 | |
| RE: interfacing sram | 01/01/70 00:00 | |
| RE: interfacing sram | 01/01/70 00:00 | |
RE: interfacing sram | 01/01/70 00:00 |



