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???
04/28/03 17:45
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#44443 - RE: Dinamic time delay
Responding to: ???'s previous message
Ok Ok Ok ....

There is no ground loop issue with the schematic that I presented before. I went back however and reviewed a design I did over 10 years ago to look at exactly how I made the AC detect circuit. It was somewhat different and so I re-drew my previous example and show it here. And as a matter of fact I just broke open a 12 VDC wall wart and built the transistor circuit onto the terminals of the internal bridge rectifier circuit. The version shown here works great. I found the previous version to be a little sensitive during the part of the cycle where the base of the transistor is supposed to be off. If you look closely at the circuit you can see that the base resistor is driven by a 1/2 wave rectified sine wave pulse. However the negative half cycle has the base at one diode drop above ground due to the negative leg diode in the bridge. This would make the NPN transistor "almost" want to be ON but not quite. By moving the diode into series with the base the transistor is kept off completely during the negative half cycles and will not turnon on the positive cycles till the AC voltage is greater than the diode drop plus the Vbe of the transistor.



Now....taken as shown this works great. Contrary to previous posters that tried to critique the original circuit...they were looking at issues that did not exist. There were no ground loop problem, there is no need for capacitor coupling and no need for opto coupling.

Done
Michael Karas


List of 30 messages in thread
TopicAuthorDate
Dinamic time delay            01/01/70 00:00      
   RE: Dinamic time delay            01/01/70 00:00      
   RE: Dinamic time delay            01/01/70 00:00      
      RE: Dinamic time delay            01/01/70 00:00      
         RE: Dinamic time delay            01/01/70 00:00      
            RE: Dinamic time delay            01/01/70 00:00      
               RE: Dinamic time delay, Michael            01/01/70 00:00      
               RE: Dinamic time delay            01/01/70 00:00      
                  RE: Dinamic time delay            01/01/70 00:00      
               Nitpicking schematics            01/01/70 00:00      
   RE: Dinamic time delay            01/01/70 00:00      
      RE: Dinamic time delay            01/01/70 00:00      
         RE: Dinamic time delay            01/01/70 00:00      
         RE: Dinamic time delay            01/01/70 00:00      
            RE: Dinamic time delay            01/01/70 00:00      
               RE: Dinamic time delay            01/01/70 00:00      
   RE: Dinamic time delay            01/01/70 00:00      
   RE: Dinamic time delay            01/01/70 00:00      
   RE: Dinamic time delay            01/01/70 00:00      
      RE: Dinamic time delay. Rob            01/01/70 00:00      
         RE: Dinamic time delay. Rob            01/01/70 00:00      
            RE: Dinamic time delay. Rob            01/01/70 00:00      
               RE: And Kai...............            01/01/70 00:00      
               RE: Dinamic time delay. Rob            01/01/70 00:00      
               RE: Dinamic time delay. Rob            01/01/70 00:00      
                  RE: Dinamic time delay. Rob            01/01/70 00:00      
                     RE: Dinamic time delay. Rob            01/01/70 00:00      
                        RE: Dinamic time delay. Rob            01/01/70 00:00      
   RE: Dinamic time delay            01/01/70 00:00      
      FPGA            01/01/70 00:00      

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