A few years ago I ran into this problem using P0 and P2 for external data memory access and meanwhile multiplexing P0 as general purpose I/O port throught another 74HC244 (for input) and another 74HC573 (for output), it was a nightmare and I ended up reconfiguring everything. Recently one of my colleagues came up this type of "multiplex" configuration again, I would like to convince him that this is not the right way to go (or convince myself that I did something wrong), but I don't have my old prototype board available any more. Can anyone give me an explanation as to why P0 or P2 can not be used as general purpose I/O when being used as the ADDR/DATA BUS for external memory during a normal operation?

To Eric:
You mentioned some special circuit that might be needed if one chooses to do so in one of your replies to Raj Nambiar . Can you describe the circuit? Thanks.