Thanks for all the replies and I am sorry that I didn't give out all the information.

1)I have 128K SRAM on the target with A16 permanently grounded because we were told that 64K SRAM would be obsolete, and I do need a quite large amount of SRAM for keeping up system event logs.

2)Kai's address decoding scheme works but it also means that I would have to sacrifice the entire 256 byte page for every 8-bit I/O port added.

3)I have an old device that multiplexes P1 for connecting to one 74HC244 and one 74HC573, now I am moving this multiplexed port to P2 and experimenting the new scheme.

4)One other thing that I am afraid of is that this type of unconvensional scheme may upset any emulator. I am using Signum System's ICE and have already gotten enough headaches.

Again, thanks to all of you. I truly appreciate your helps.