| ??? 06/20/03 18:33 Read: times |
#48921 - RE: Correction/K. Klaas Responding to: ???'s previous message |
2)Kai's address decoding scheme works but it also means that I would have to sacrifice the entire 256 byte page for every 8-bit I/O port added.
that is why MMIO is generally done by decoding A0-A7 ANDed with A8-15 making ff00-ffff I/O space. 3)I have an old device that multiplexes P1 for connecting to one 74HC244 and one 74HC573, now I am moving this multiplexed port to P2 and experimenting the new scheme. See above, you MUST keep in mind tht using the 'memory ports' 0 and 2 require special logic. 4)One other thing that I am afraid of is that this type of unconvensional scheme may upset any emulator. I am using Signum System's ICE and have already gotten enough headaches. if your emulator can operate with RAM external to the emulator (most can) it will be no problem. Erik |
| Topic | Author | Date |
| Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| Correction | 01/01/70 00:00 | |
| RE: Correction/K. Klaas | 01/01/70 00:00 | |
RE: Correction/K. Klaas | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 |



