| ??? 06/19/03 20:49 Read: times |
#48857 - RE: Multiplex P0 for I/O and XRAM access Responding to: ???'s previous message |
Memory Mapped I/O is to map I/O as memory.
In A (C)PLD or if you absolutely insist with discrete logic - you decode typically address 0xff.. and use that together with the low address bits and !RD or !WR to gate/strobe your various I/O to P0. Anyhow if 8k or less of RAM is enough, why bother. The Philips P89C668 has 64k of Flash and 8k of RAM inside leaving all 32 port pins for I/O. There are other derivatives with plenty RAM inside (RB2, RC2, RD2, 660, 662, 664, 669 and more), use Keils device search to find them. Erik |
| Topic | Author | Date |
| Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| Correction | 01/01/70 00:00 | |
| RE: Correction/K. Klaas | 01/01/70 00:00 | |
RE: Correction/K. Klaas | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 | |
| RE: Multiplex P0 for I/O and XRAM access | 01/01/70 00:00 |



