Email: Password: Remember Me | Create Account (Free)

Back to Subject List

Old thread has been locked -- no new posts accepted in this thread
???
06/20/03 09:17
Read: times


 
#48881 - RE: Multiplex P0 for I/O and XRAM access
Responding to: ???'s previous message
You can get that same functonality, Ports 0-3, plus Ports 4-7 where ports 4-7 can be configured as an external data bus. You can have it work in multiplex mode, non-mux mode, 8 bits of address or 16 bits address modes. And you can use all the bits like normal Port bits. This is a ready made part as opposed to a soft design that needs to be put into an FPGA. Look at the Cygnal C8051F020 or C8051F126 in the TQFP100 packages.
Michael Karas


List of 13 messages in thread
TopicAuthorDate
Multiplex P0 for I/O and XRAM access            01/01/70 00:00      
   RE: Multiplex P0 for I/O and XRAM access            01/01/70 00:00      
   RE: Multiplex P0 for I/O and XRAM access            01/01/70 00:00      
      RE: Multiplex P0 for I/O and XRAM access            01/01/70 00:00      
         RE: Multiplex P0 for I/O and XRAM access            01/01/70 00:00      
   RE: Multiplex P0 for I/O and XRAM access            01/01/70 00:00      
      RE: Multiplex P0 for I/O and XRAM access            01/01/70 00:00      
         RE: Multiplex P0 for I/O and XRAM access            01/01/70 00:00      
      Correction            01/01/70 00:00      
         RE: Correction/K. Klaas            01/01/70 00:00      
            RE: Correction/K. Klaas            01/01/70 00:00      
      RE: Multiplex P0 for I/O and XRAM access            01/01/70 00:00      
         RE: Multiplex P0 for I/O and XRAM access            01/01/70 00:00      

Back to Subject List