| ??? 07/30/03 19:33 Read: times |
#51734 - RE: risc and cisc, to Peter - II Responding to: ???'s previous message |
That's not good, there is not, so say, the linearity, f.e. what's happend with delay if (r1,r0)=(0x00,0xFF) and then (r1,r0)=(0x01,0x00).
One of the most common traps in '51 assembler coding. just before the loop you must do if Rlow !=0 then Rhigh+1 Erik |
| Topic | Author | Date |
| risc and cisc | 01/01/70 00:00 | |
| RE: risc and cisc | 01/01/70 00:00 | |
| RE: risc and cisc | 01/01/70 00:00 | |
| RE: risc and cisc | 01/01/70 00:00 | |
| RE: risc and cisc | 01/01/70 00:00 | |
| RE: risc and cisc | 01/01/70 00:00 | |
| RE: risc and cisc | 01/01/70 00:00 | |
| RE: risc and cisc, to Peter | 01/01/70 00:00 | |
| RE: risc and cisc, to George | 01/01/70 00:00 | |
| RE: risc and cisc, to Erik | 01/01/70 00:00 | |
| RE: risc and cisc, to Erik | 01/01/70 00:00 | |
| RE: risc and cisc, to Erik | 01/01/70 00:00 | |
| RE: risc and cisc, to George | 01/01/70 00:00 | |
| RE: risc and cisc, to Peter | 01/01/70 00:00 | |
| RE: risc and cisc, to Peter - II | 01/01/70 00:00 | |
| RE: risc and cisc, to Peter - II | 01/01/70 00:00 | |
| RE: risc and cisc, to Peter - II | 01/01/70 00:00 | |
| RE: risc and cisc, to Peter - II | 01/01/70 00:00 | |
| RE: risc and cisc, to Peter - II | 01/01/70 00:00 | |
| RE: risc and cisc | 01/01/70 00:00 | |
| RE: WGASA | 01/01/70 00:00 | |
RE: WGASA | 01/01/70 00:00 |