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???
07/31/03 13:55
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#51818 - RE: risc and cisc, to Peter - II
Responding to: ???'s previous message
@George,

I use such loops mostly for delay generation and then there is no disadvantage, since the needed values can be calculated already on assembling time:

http://www.specs.de/users/dan.../index.htm


The other usage was to expand counter interrupts to 24 or 32 bytes. This give extremely fast and short code, since DJNZ not change any flags and nothing to PUSH and POP inside the interrupt:

org 000Bh
djnz val_b2, m1
inc val_b3
m1:
reti

After reading an easy correction must be done, thats all:

xrl val_b2, #0FFh
inc val_b2

An example can be seen at:

http://www.specs.de/users/dan.../index.htm




I agree, shift operations are little more awkward, but they are only two times needed, for mul and div inside my arithmetic library. So the effect should be to expand the whole code only of about 0.01% or less.

In other words, multiple byte shifts are not the bread and butter of my applications.


Peter


List of 22 messages in thread
TopicAuthorDate
risc and cisc            01/01/70 00:00      
   RE: risc and cisc            01/01/70 00:00      
      RE: risc and cisc            01/01/70 00:00      
         RE: risc and cisc            01/01/70 00:00      
            RE: risc and cisc            01/01/70 00:00      
         RE: risc and cisc            01/01/70 00:00      
            RE: risc and cisc            01/01/70 00:00      
            RE: risc and cisc, to Peter            01/01/70 00:00      
               RE: risc and cisc, to George            01/01/70 00:00      
                  RE: risc and cisc, to Erik            01/01/70 00:00      
                     RE: risc and cisc, to Erik            01/01/70 00:00      
                        RE: risc and cisc, to Erik            01/01/70 00:00      
                           RE: risc and cisc, to George            01/01/70 00:00      
               RE: risc and cisc, to Peter            01/01/70 00:00      
                  RE: risc and cisc, to Peter - II            01/01/70 00:00      
                     RE: risc and cisc, to Peter - II            01/01/70 00:00      
                        RE: risc and cisc, to Peter - II            01/01/70 00:00      
                           RE: risc and cisc, to Peter - II            01/01/70 00:00      
                     RE: risc and cisc, to Peter - II            01/01/70 00:00      
   RE: risc and cisc            01/01/70 00:00      
   RE: WGASA            01/01/70 00:00      
      RE: WGASA            01/01/70 00:00      

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