Another method is to use one cpu to send an interrupt to the other processor when it has written the information.

An example:

CPU1.
write data to dual port ram
port pin low -to interrupt cpu2
port pin high
allow time for cpu2 to read the data
you could also have cpu2 interrupt cpu1 when it has finished.

CPU2.
when interrupted by cpu1, read the data as soon as possible.
(optional) send interrupt to cpu1 to say we've got the data.

As an aside, do you REALLY need to use dual port ram?? would it not be possible to use the serial port to achieve the same? the dual port ram is expensive - more so than the cpu - would you application benefit from using only one cpu but a faster one?


As for using the BUSY line, you haven't read the data have you?? With the 8051 we have no means of extending the bus cycle (short of clock stretching) so the use of the busy line will not acheive the required result. The DPR only sees the bus cycles of the respective cpus - by the time your code samples the busy line through a port pin, the bus cycles have completed.