| ??? 11/19/03 20:51 Read: times |
#59061 - RE: Dual Port Ram memory problems Responding to: ???'s previous message |
If you run both of the 8051 off of the same clock signal, but invert the clock signal to one of the 8051's , you shouldn't need to look for a "busy" signal. You would guarantee that you would not get a read at the same time that location is being written.
Wrong, !RD might start 1/2 clock cycle after !WR and both pulses are wider than 1/2 clock cycle. Erik |
| Topic | Author | Date |
| Dual Port Ram memory problems | 01/01/70 00:00 | |
| RE: Dual Port Ram memory problems | 01/01/70 00:00 | |
| RE: Dual Port Ram memory problems | 01/01/70 00:00 | |
| RE: Dual Port Ram memory problems | 01/01/70 00:00 | |
| RE: Dual Port Ram memory problems | 01/01/70 00:00 | |
| RE: Dual Port Ram memory problems | 01/01/70 00:00 | |
| RE: Dual Port Ram memory problems | 01/01/70 00:00 | |
| RE: Dual Port Ram memory problems | 01/01/70 00:00 | |
| RE: Dual Port Ram memory problems | 01/01/70 00:00 | |
| RE: Dual Port Ram memory problems | 01/01/70 00:00 | |
| RE: Dual Port Ram memory problems | 01/01/70 00:00 | |
| RE: Dual Port Ram memory problems | 01/01/70 00:00 | |
| RE: Dual Port Ram memory problems | 01/01/70 00:00 | |
| RE: Dual Port Ram memory problems | 01/01/70 00:00 | |
| RE: Dual Port Ram memory problems | 01/01/70 00:00 | |
RE: Dual Port Ram memory problems | 01/01/70 00:00 |



