| ??? 12/11/03 11:02 Read: times |
#60432 - RE: potato, potatoe Responding to: ???'s previous message |
"I was just showing how I architect this type of design that avoids the question all together"
Michael, I don't see how your solution avoids the issue. How do you prevent an interrupt from occurring immediately before entering idle mode? It seems that the OP wants to take action in the "main loop" immediately after every execution of any ISR. Your scheme still seems to allow the possibility that an interrupt could occur immediately before entering idle, meaning that the CPU will remain in idle until the *following* interrupt has been serviced. |
| Topic | Author | Date |
| Interrupts & Idle mode | 01/01/70 00:00 | |
| RE: Interrupts & Idle mode | 01/01/70 00:00 | |
| RE: Interrupts & Idle mode | 01/01/70 00:00 | |
| RE: fully compatible with the MCS-51 | 01/01/70 00:00 | |
| potato, potatoe | 01/01/70 00:00 | |
| RE: potato, potatoe | 01/01/70 00:00 | |
| RE: potato, potatoe | 01/01/70 00:00 | |
| RE: potato, potatoe | 01/01/70 00:00 | |
| RE: potato, potatoe | 01/01/70 00:00 | |
| RE: potato, potatoe | 01/01/70 00:00 | |
| RE: potato, potatoe | 01/01/70 00:00 | |
| RE: potato, potatoe | 01/01/70 00:00 | |
| RE: potato, potatoe | 01/01/70 00:00 | |
| RE: Interrupts & Idle mode | 01/01/70 00:00 | |
| RE: Interrupts & Idle mode | 01/01/70 00:00 | |
| RE: Interrupts & Idle mode | 01/01/70 00:00 | |
RE: Interrupts & Idle mode | 01/01/70 00:00 |



