Hi,
well, here is an abstract example about how it should be done to prevent "side-effects":

; global variable shared by both main() and ISRs
INT_FLAGS  DATA 0x20
FLG_INT_A  BIT  INT_FLAGS.0
FLG_INT_B  BIT  INT_FLAGS.1
FLG_INT_C  BIT  INT_FLAGS.2
FLG_INT_D  BIT  INT_FLAGS.3
;....

; an interrupt service routine
; (others have similar piece of code with appropriate bit set)
ISR_INT_A:
	SETB  FLG_INT_A	; set own flag
; rest of ISR code (if needs)
	RETI

; --- program body ---
; at program setup, clear INT_FLAGS variable,
; init interrupt system etc...
 
; now the main loop
MAIN:	SETB EI			; enable interrupts
	MOV  PCON,#1		; sleep mode
	NOP			; some parts require it
LOOKUP:	JBC  FLG_INT_A,EVENT_A_ROUTINE
	JBC  FLG_INT_B,EVENT_B_ROUTINE
	JBC  FLG_INT_C,EVENT_C_ROUTINE
	JBC  FLG_INT_D,EVENT_D_ROUTINE
; ....
LOOK_AGAIN:
        CLR  EI			; disable ITs temporally
        MOV  A,INT_FLAGS       
	JZ   MAIN		; no interrupts occured
; if we are here then it was at least one interrupt processed
; while we react on events - check them again
        SETB	EI
	JMP  LOOKUP

; here you may place EVENT_x_ROUTINE long call
EVENT_A_ROUTINE:
	CALL	EVENT_A_SR
	JMP	LOOK_AGAIN

; and event reaction subroutines as well
EVENT_A_SR:
; reaction code
	RET


	END

What is important? Okay, using JBC is not required but it guarantees you that if the same interrupt comes again before you done react on current one then it not be lost. Really, usage of:

	JNB	FLG_INT_A,NEXT_FLAG_CHECK
	CLR	FLG_INT_A
	CALL	EVENT_A_SR

may lost second interrupt if it comes at JNB and will be serviced before CLR flag. Of course, it is possible to use event counters instead flags then (=

Another important thing is place MOV PCON exactly after enabling EI. By this way, you block potential interrupts on one command to be executed and this command is put MCU to sleep mode. Even interrupt comes at SETB EI it will be serviced after MOV PCON is executed and as result, program wake ups and produce MAIN cycle. For example, if you put NOP between these commands then it makes a chance that an interrupt service routine executes before MOV PCON and so, processor will sleep not knowing about that fact.

Good days!