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???
02/09/04 18:31
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#64332 - Correction:
Responding to: ???'s previous message
What I meant was... I have been using
Mode 0 ie. shift register mode to interface
the ADCs and DACs .. and I have never had a
problem with that.

Here is how it works on most ADCs and DACs

P3.0 (RXD) to receive data
P3.1 (TXD) to drive the serial clock.

Use any other pins for the READ/WRITE control
Most probably you will have to put
an inverter in the serial clock because
the data is present only on the falling edge.

each read from SBUF will get 8 bits of data.
If you want to read in 32-bits. Just access
the SBUF four times. Let me know what u think.

thanks
Ashish

ps. Please let me know the ADC part # if possible

List of 25 messages in thread
TopicAuthorDate
adc interfacing.            01/01/70 00:00      
   RE: adc interfacing.            01/01/70 00:00      
   RE: adc interfacing.            01/01/70 00:00      
   RE: adc interfacing.            01/01/70 00:00      
      RE: adc interfacing.            01/01/70 00:00      
      UART Shift Register mode            01/01/70 00:00      
      Read each bit in turn            01/01/70 00:00      
         RE: andy neil            01/01/70 00:00      
            RE: andy neil            01/01/70 00:00      
               RE: andy neil            01/01/70 00:00      
         RE: Read each bit in turn            01/01/70 00:00      
            RE: michael neary            01/01/70 00:00      
            RE: Read each bit in turn            01/01/70 00:00      
               RE: Read each bit in turn            01/01/70 00:00      
               RE: Read each bit in turn            01/01/70 00:00      
      RE: adc interfacing.            01/01/70 00:00      
         Correction:            01/01/70 00:00      
         RE: ashish pradhan            01/01/70 00:00      
            RE: ashish pradhan            01/01/70 00:00      
               RE: ashish pradhan            01/01/70 00:00      
                  RE: ashish pradhan            01/01/70 00:00      
                     RE: ashish pradhan            01/01/70 00:00      
                     RE: ashish pradhan            01/01/70 00:00      
   RE: adc interfacing.            01/01/70 00:00      
      RE: adc interfacing.            01/01/70 00:00      

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