| ??? 02/10/04 01:08 Read: times |
#64364 - RE: Read each bit in turn Responding to: ???'s previous message |
Michael Neary wrote
Each output bit is present from (very) shortly after the rising edge of the clock until (very) shortly after the next rising edge. you meant " each output is present from (very) shortly after the FALLING EDGE .yes? |
| Topic | Author | Date |
| adc interfacing. | 01/01/70 00:00 | |
| RE: adc interfacing. | 01/01/70 00:00 | |
| RE: adc interfacing. | 01/01/70 00:00 | |
| RE: adc interfacing. | 01/01/70 00:00 | |
| RE: adc interfacing. | 01/01/70 00:00 | |
| UART Shift Register mode | 01/01/70 00:00 | |
| Read each bit in turn | 01/01/70 00:00 | |
| RE: andy neil | 01/01/70 00:00 | |
| RE: andy neil | 01/01/70 00:00 | |
| RE: andy neil | 01/01/70 00:00 | |
| RE: Read each bit in turn | 01/01/70 00:00 | |
| RE: michael neary | 01/01/70 00:00 | |
| RE: Read each bit in turn | 01/01/70 00:00 | |
| RE: Read each bit in turn | 01/01/70 00:00 | |
| RE: Read each bit in turn | 01/01/70 00:00 | |
| RE: adc interfacing. | 01/01/70 00:00 | |
| Correction: | 01/01/70 00:00 | |
| RE: ashish pradhan | 01/01/70 00:00 | |
| RE: ashish pradhan | 01/01/70 00:00 | |
| RE: ashish pradhan | 01/01/70 00:00 | |
| RE: ashish pradhan | 01/01/70 00:00 | |
| RE: ashish pradhan | 01/01/70 00:00 | |
RE: ashish pradhan | 01/01/70 00:00 | |
| RE: adc interfacing. | 01/01/70 00:00 | |
| RE: adc interfacing. | 01/01/70 00:00 |