| ??? 02/10/04 01:29 Read: times |
#64365 - RE: andy neil Responding to: ???'s previous message |
"how can i generate the clock and read at the same time??"
Well, of course not absolutely literally at the same time. But no two things ever really happen at absolutely the same time - there always has to be cause, effect, and even just the minutest delay between the two. After all, time is just Nature's way of ensuring that everything doesn't happen all at once! It is the clock edge that causes the ADC to present the next bit onto the interface; that state will then persist until the next edge. Thus, the read process goes something like: 1. Cause the edge 2. (wait a little while) 3. Read the bit The minimum & maximum time between the edge & sampling the data will be specified in the data sheet Does that help? |
| Topic | Author | Date |
| adc interfacing. | 01/01/70 00:00 | |
| RE: adc interfacing. | 01/01/70 00:00 | |
| RE: adc interfacing. | 01/01/70 00:00 | |
| RE: adc interfacing. | 01/01/70 00:00 | |
| RE: adc interfacing. | 01/01/70 00:00 | |
| UART Shift Register mode | 01/01/70 00:00 | |
| Read each bit in turn | 01/01/70 00:00 | |
| RE: andy neil | 01/01/70 00:00 | |
| RE: andy neil | 01/01/70 00:00 | |
| RE: andy neil | 01/01/70 00:00 | |
| RE: Read each bit in turn | 01/01/70 00:00 | |
| RE: michael neary | 01/01/70 00:00 | |
| RE: Read each bit in turn | 01/01/70 00:00 | |
| RE: Read each bit in turn | 01/01/70 00:00 | |
| RE: Read each bit in turn | 01/01/70 00:00 | |
| RE: adc interfacing. | 01/01/70 00:00 | |
| Correction: | 01/01/70 00:00 | |
| RE: ashish pradhan | 01/01/70 00:00 | |
| RE: ashish pradhan | 01/01/70 00:00 | |
| RE: ashish pradhan | 01/01/70 00:00 | |
| RE: ashish pradhan | 01/01/70 00:00 | |
| RE: ashish pradhan | 01/01/70 00:00 | |
RE: ashish pradhan | 01/01/70 00:00 | |
| RE: adc interfacing. | 01/01/70 00:00 | |
| RE: adc interfacing. | 01/01/70 00:00 |



