Go to http://www.asics.ws From there you 'll be redirected to www.opencores.org (as Jez mentioned first) if you want to download the files of the free IP cores that asics.ws gives. They seem to deisgn with Verilog instead of VHDL and that can really be a problem. Jez already underlined the problem with opencores.org (that is the lack of the standardisation on the tools they use there), but afterall we talk about open (free) cores, and since there are so many HDLs, then either you have to learn all of them or live with the problem...

George